-intstyle "ise" -incremental -lib "unisims_ver" -lib "unimacro_ver" -lib "xilinxcorelib_ver" -lib "secureip" -o "F:/Verilog/Project_2_OC/TestProject/testbench_isim_beh.exe" -prj "F:/Verilog/Project_2_OC/TestProject/testbench_beh.prj" "work.testbench" "work.glbl" 
